DESIGN FEATURES OF MULTI-BIT CMOS-CNI-ADC TO CREATE MULTI-CHANNEL HIGH-SPEED DSP SYSTEMS WITH INCREASED FAULT TOLERANCE
Abstract and keywords
Abstract (English):
The features and possibilities of using foreign and domestic foundry technologies in the creation of CMOS-ADC for high-speed multichannel DSP systems with increased fault resistance to the effects of TKCH are considered. The architecture and technique of ADC balancing, which provide an increase in the conversion rate when several ADCS operate in the alternating mode, are presented. The technique of double reservation of sources of «weight» currents is considered. The necessity of using an additional current source and dual series-connected CMOS transistors instead of single transistors of the same conductivity type is substantiated. It is noted that the proposed solutions provide effective amortization of the impact of TKCH with the most "dangerous" energies of 20-100 MeV/nucleon

Keywords:
analog-to-digital Converter (ADC), digital-to-analog Converter (DAC), digital signal processing (DSP), fault tolerance, heavy charged particles (TCH).
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