Application of neural networks for power consumption optimization in VLSI circuits
Abstract and keywords
Abstract (English):
The article explores innovative methods of applying neural networks and deep learning to improve energy efficiency in very large-scale integration (VLSI) circuits. As design complexity increases and energy consumption requirements become more stringent, traditional analytical approaches demonstrate limited effectiveness. Neural network technologies allow for the identification of non-linear dependencies between circuit parameters and their energy consumption, providing a breakthrough in optimization. Key areas include predicting energy consumption at the design stage using regression models, dynamic power management through adaptive voltage/frequency scaling (DVFS), optimizing circuit element topology, and minimizing leakage currents. Experimental data demonstrate a 30-40% reduction in energy consumption compared to classical methods through the use of hybrid architectures with hardware accelerators, dynamic computation precision scaling (8-bit operations instead of 32-bit), and in-memory data processing (pim architectures). special attention is given to methodological aspects: development of adaptive learning algorithms with gradient descent, integration of rnn and lstm networks for temporal analysis, and model verification procedures considering technological parameter variation. The study confirms that neural network approaches provide multi-criteria optimization, balancing performance, energy consumption, and chip area

Keywords:
Neural networks, power consumption, very-large-scale integration (VLSI) circuits, optimization, deep learning, dynamic voltage and frequency scaling (DVFS), power consumption forecasting, adaptive methods, multi-criteria optimization, training algorithms
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