00852naa#a2200205#i#4500001001500000005001700015011001400032100004100046102000700087200011700094210013700211215001000348608002700358675011800385700003700503700003900540700003500579700001700614856001500631EN\\bibl\8917420250329152745.6##a2219-0767##a20241023b2024####ek#y0engy0150####ca##aRU1#aFormalization of topology and electrical circuit verification for computer-aided design systemseJournal article1#aVoronezhcFSBE Institution of Higher Education Voronezh State University of Forestry and Technologies named after G.F. Morozovd2024##a9 с.##aJournal article2local##aНосители вводимых и выводимых данных. Запоминающие среды. 004.08#1aSkvortsovagTatyana Vladimirovna#1aZolnikovgKonstantin Vladimirovich#1aPlotnikovgAleksey Mihaylovich#1aScorkingI V4#anaukaru.ru