TY  JOUR
TI  CREATING A TEST ENVIRONMENT AND HOW TO LOAD TESTS DURING CHIP DESIGN
KW  microchips
KW  microelectronics
KW  design
KW  tests
KW  test loading
JO  Modeling of systems and processes
AU  Chubur, K.A.
AU  Kulay, A..
AU  Savchenko, A..
AU  Zolnikov, K.V.
AU  Gridnev, A.E.
PY  2020
IS  13
PB  FSBE Institution of Higher Education Voronezh State University of Forestry and Technologies named after G.F. Morozov